Automated Hardware Trojan Insertion in Industrial-Scale Designs
PositiveArtificial Intelligence
The recent publication on automated hardware Trojan insertion presents a scalable methodology designed to generate HT-like patterns within industrial-scale Systems-on-Chips (SoCs). Given the complexity of these designs, which can include millions of connectivity edges, evaluating hardware-Trojan detectors has been both necessary and challenging. Traditional benchmarks are often too small and hand-crafted, raising ethical concerns about releasing malicious RTL. The new methodology addresses these issues by creating reproducible challenge instances that mimic the statistical footprint of stealthy Trojans. However, the evaluation of state-of-the-art graph-learning models revealed their inability to detect these Trojans effectively, underscoring the existing evaluation gap between academic circuits and modern SoCs. This work is crucial as it not only enhances the testing of detection tools but also contributes to the broader field of secure hardware design.
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